Being disrupted during your workday can hinder your efficiency and speed of completing tasks. Similarly, a computer’s central processing unit (CPU) core faces the same issue. Whenever the CPU core must halt its current operation for every new assignment, this constant interruption can lead to significant slowdowns across the entire system.
Scientists from Purdue University’s Department of Computer Science have created a novel approach that eliminates the need for polling, where a whole CPU is dedicated to monitoring and directing network traffic. This conventional method tends to be inefficient as theCPU could potentially be utilized more effectively for other operations.
A more intelligent, quicker alert system
The researchers
presented their findings
At the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS),
ASPLOS
The paper received the 2025 Best Paper Award at the 2025 ASPLOS Conference.
Unused CPU cores are highly crucial for data centers and cloud computing operations, and this finding is anticipated to be embraced by CPU makers to enhance the efficiency of data centers.
The study was headed by Berk Aydogmus, who is pursuing a Ph.D. in Computer Science, with his primary mentor being his advisor, Assistant Professor Kazem Taram from the Department of Computer Science within the College of Science.
Taram clarified that in computer systems, CPU cores typically manage various types of events. For instance, upon receiving information from a network interface, the CPU gets interrupted and must divert its attention to process the incoming data.
This incurs additional load on the CPU since it must frequently change focus from one task to another—much like how being interrupted during an important conversation can disrupt your train of thought, making it more difficult and slower to resume where you left off. Conversely, we aim to handle incoming network data swiftly; however, using interruptions for this purpose is inefficient because transitioning to manage network activities takes considerable time.
This finding affects cloud systems and major data centers, consequently influencing the complete computational process for users. It enhances effectiveness at higher levels, leading to more streamlined functions across these networks.
Taram mentioned that CPUs within data centers and cloud infrastructure must swiftly manage various kinds of events since trillions occur each second. These events encompass actions such as receiving packets over the network, allocating new tasks for execution on processing cores (known as preemption), and concluding operations initiated by components like graphics processors (GPUs). Enhancing proficiency in managing these events could boost both operational speed and power conservation in data centers.
Solving the polling problem
Taram mentioned that his method is more efficient compared to polling, where an entire CPU core continuously monitors for events such as incoming tasks.
He explained that it’s akin to repeatedly checking your email whenever you anticipate receiving an important message. Clearly, this is inefficient since you end up doing nothing else during that time.
Taram explained that similarly, using polls consumes valuable CPU cores that could either perform meaningful tasks or remain idle to enhance power efficiency. To address this inefficient approach, this study introduces an alternate solution known as extended interrupt (xUI). ‘The xUI technique minimizes the burden on CPUs from handling interrupts,’ Taram noted. ‘By making interrupts swift, we eliminate the necessity of relying on polling and prevent wasting CPU resources. Instead, these processors can continue their crucial duties; when quick interrupts signal events, they shift focus with negligible additional effort.’
Taram specializes in computer architecture and security. His investigations center on advanced CPU designs, microarchitectural threats, efficient countermeasures against these vulnerabilities, as well as architectural enhancements for bolstering security and privacy. Additionally, he is affiliated with The Center for Education and Research in Information Assurance and Security (CERIAS).
Taram mentioned that all current high-performance processors clear the pending instructions upon receiving an interrupt. The innovation here lies in demonstrating that flushing these instructions isn’t necessary, which enhances the efficiency of handling interruptions.
The other members of the research team at the University of California San Diego include: Ph.D. student Linsong Guo, Ph.D. student Daniel Zuberi, research scientist Tal Garfinkel, Professor Dean Tullsen, and Assistant Professor Amy Ousterhout.
More information:
Berk Aydogmus et al., Extended User Interrupts (xUI): Swift and Versatile Notifications Without Polling
Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Vol. 2
(2025).
DOI: 10.1145/3676641.3716028
Provided by Purdue University
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